Add bin and edit workflow

bin/gems/rouge-4.7.0/lib/rouge/demos/vhdl

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+entity toggle_demo is
+	port (
+		clk_in : in  std_logic; -- System Clock
+		data_q : out std_logic	-- Toggling Port
+	);
+end entity toggle_demo;
+
+architecture RTL of toggle_demo is
+	signal data : std_logic := '0';
+begin
+
+	data_q <= data;
+
+	data_proc : process (clk_in)
+	begin
+	
+		if (rising_edge(clk_in)) then
+			data <= not data;
+		end if;
+	
+	end process; 
+
+end architecture RTL;